Assume: Inst1 is followed by Instr2.
Instr2 is (true) data dependent on Inst1, if Inst1 writes its output in a register Reg (or memory location) that Instr2 reads as its input.
Instr2 is antidependent Inst1 if Inst1 reads data from a register Reg (or memory location) which is subsequently overwritten by Instr2.
Instr2 is output dependent Inst1 if both write in the same register Reg (or memory location) and Instr2 writes its output after Inst1.
Instr2 control dependent Inst1 if Inst1 must complete before a decision can be made whether or not to execute Instr2.
A data dependence is sometimes also called true or real data dependence, while anti- and output dependences are sometimes called false or name dependences.