Multiple-cycle operations and out-of-order execution
Problem (multi-cycle operations): Inst1 and Inst2, with Inst1 fetched before Inst2, and assume that Inst1 is a long-running (e.g. floating-point) instruction.
Impractical solution: to require that all instructions complete their EX stage in one clock cycle since that would mean accepting a slow clock.
Instead, the EX stage might be allowed to last as many cycles as needed to complete Inst1.
This, however, causes a structural hazard in EX stage because the succeeding instruction Inst2 cannot use the ALU in the next cycle.