Lessons learned from dataflow
Superscalar microprocessors display an out-of-order dynamic execution that is referred to as local dataflow or micro dataflow.
Colwell and Steck 1995, in the first paper on the PentiumPro:“The flow of the Intel Architecture instructions is predicted and these instructions are decoded into micro-operations (?ops), or series of ?ops, and these ?ops are register-renamed, placed into an out-of-order speculative pool of pending operations, executed in dataflow order (when operands are ready), and retired to permanent machine state in source program order.”
State-of-the-art microprocessors typically provide 32 (MIPS R10000), 40 (Intel PentiumPro) or 56 (HP PA-8000) instruction slots in the instruction window or reorder buffer.
Each instruction is ready to be executed as soon as all operands are available.