CDC 6600 processor
Delivered in 1964 by Control Data Corporation
Register-register instruction set (load/store architecture)
3-address instruction format ? several characteristics of a RISC processor
First processor to make extensive use of multiple functional units
10 FUs able to operate simultaneously on 24 registers
- 4 FUs for 60-bit floating-point operations among eight 60-bit operand registers,
- 6 FUs for logic, indexing, and program control on the eight 18-bit address registers and eight 18-bit increment/index registers.