I-cache access and instruction fetch
Harvard architecture: separate instruction and data memory and access paths
- is internally used in a high-performance microprocessor with separate on-chip primary I-cache and D-cache.
The I-cache is less complicated to control than the D-cache, because
- it is read-only and
- it is not subjected to cache coherence in contrast to the D-cache.
Sometimes the instructions in the I-cache are predecoded on their way from the memory interface to the I-cache to simplify the decode stage.