Predecoding can be done when the instructions are transferred from memory or secondary cache to the I-cache. ? the decode stage is more simple.
MIPS R10000: predecodes each 32-bit instruction into a 36-bit format stored in the I-cache.
- The four extra bits indicate which functional unit should execute the instruction.
- The predecoding also rearranges operand- and destination-select fields to be in the same position for every instruction, and
- modifies opcodes to simplify decoding of integer or floating-point destination registers.
The decoder can decode this expanded format more rapidly than the original instruction format.