Chapter 5

Prelude - Chapter 1 - Chapter 2 - Chapter 3 - Chapter 4 - Chapter 5 - Chapter 6 - Chapter 7


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Table of Contents

Chapter 5

Microprocessors: today (Y2K++)

Trends and principles in the giga chip era

Microprocessors: tomorrow (Y2K-2012)

Design challenges

Application and economy-related trends

Architectural challenges and implications

Possible solutions

Future processor architecture principles

Future processors to use coarse-grain parallelism

Processor techniques that speedup single threaded applications

The trace cache

The trace cache (2)

The trace cache - performance

Superspeculative processors

Strong- vs. weak-dependence model

Implementation of a weak-dependence model

Superflow processor

Superflow processor proposal

Advanced superscalar processors - Characteristics

Advanced superscalar processor

Requirements and solution

Multi-hybrid branch predictor

Instruction supply and out-of-order fetch

Data supply

Execution core

Conclusions

Processors that use thread-level speculation to boost single-threaded programs

Multiscalar processors

Multiscalar mode of execution

Multiscalar processor

Proper resolution of inter-task data dependences

The multiscalar paradigm has at least two forms of speculation:

Alternatives with thread-level speculation

Trace processors

Trace processor

Trace processor

DataScalar processors

Address space

Accesses of DataScalar processors to memory

Why DataScalar?

Execution mode

Pros and cons

Pros and cons

Author: Jurij Silc

Email: Jurij.Silc@ijs.si

Home Page: http://www-csd.ijs.si/silc

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