Conclusions on CMP
Usually, a CMP will feature:
- separate L1 I-cache and D-cache per on-chip CPU
- and an optional unified L2 cache.
If the CPUs always execute threads of the same process, the L2 cache organization will be simplified, because different processes do not have to be distinguished.
Recently announced commercial processors with CMP hardware:
- IBM Power4 processor with 2 processor on a single die
- Sun MAJC5200 two processor on a die (each processor a 4-threaded block-interleaving VLIW)