M. Mali, F. Novak, A. Biasizzo.
Hardware implementation of AES algorithm.
Journal of Electrotechnical Engineering, Vol. 56, No. 9-10, 2005, pp. 265-269.
The paper presents a hardware implementation of the AES algorithm developed for
an external data storage unit in a dependable application. The algorithm was
implemented in FPGA using the development board Celoxica RC1000 and development
suite Celoxica DK1. The purpose of this prototype version was to test the correctness
of the implemented algorithm and to gain experience in optimisation of algorithm
structure for the prospective embedded implementation in the target application.