An approach to testing mixed-signal cores in SOCs,
Proc. 4th European Microelectronics and Packaging Symposium, EMPS 2006, pp. 223-227, Terme Catez, Slovenia, May 21-24, 2006.
In the paper we present the results of a feasibility study of implementing the histogram based
ADC built-in self-test within the IEEE 1500 test wrapper. The advantage of the approach is that
test outcomes from the ADC are processed within the test wrapper which considerably reduces data
transfer between the System-on-Chip under test and the test equipment.