P.Mrak, A.Biasizzo, F.Novak.
Implementation of linear histogram based ADC testing, a case study,
Informal digest of papers, 13th IEEE European Test Symposium, ETS'08, pp. 223-227, Verbania, Italy, May 25-29, 2008.

We present a case study of the histogram based ADC BIST implementation. While theoretical background for the proposed technique is well-known and area overhead for different alternative implementations has been estimated, reports of implementations in practice and associated measurements are rare and not public available. In the case study we take an off-the-shelf ADC and connect it to a triangle-wave signal source via MOS switches. Digital responses are processed by the proposed BIST structure implemented on a Spartan3 FPGA device. Measurements of static parameters and associated test times are reported. The impact of MOS switches on static parameter measurements is considered. The paper offers useful information for potential practical BIST implementations in SoC.